Method and apparatus for simulating large, hierarc

专利名称：Method and apparatus for simulating large,

hierarchical microelectronic resistor circuits

发明人：Nanda Gopal申请号：US08/956868申请日：19971023公开号：US06134513A公开日：20001017

摘要：A computer implemented method for simulating a resistive circuit, including aplurality of macro circuits that are arranged hierarchically. The method includes the stepsof reading a netlist description of the resistive circuit and recursively traversing theresistive circuit starting from terminal nodes of a macro circuit at a highest level ofhierarchy using precharacterizations of each of the plurality of macro circuits todetermine node voltages and branch currents of the resistive circuit.

申请人：INTEL CORPORATION

代理机构：Blakely, Sokoloff, Taylor & Zafman LLP

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