IS65WV12816ALL-70BA2资料

IS65WV12816ALLIS65WV12816BLL128K x 16 LOW VOLTAGE,

ULTRA LOW POWER CMOS STATIC RAM

FEATURES

•High-speed access time: 55ns, 70ns•CMOS low power operation: 36 mW (typical) operating 9 µW (typical) CMOS standby•TTL compatible interface levels•Single power supply:

1.65V to 2.2V VDD (65WV12816ALL)2.5V to 3.6V VDD (65WV12816BLL)

•Fully static operation: no clock or refreshrequired

•Three state outputs

•Data control for upper and lower bytes•2CS Option Available•Temperature Offerings: Option A: 0 to 70oC

Option A1: –40 to +85oC Option A2: –40 to +105oC Option A3: –40 to +125oC•Lead-free available

NOVEMBER 2007

DESCRIPTION

The ISSI IS65WV12816ALL/ IS65WV12816BLL are high-speed, 2M bit static RAMs organized as 128K words by 16bits. It is fabricated using ISSI's high-performance CMOStechnology. This highly reliable process coupled withinnovative circuit design techniques, yields high-performance and low power consumption devices.When CS1 is HIGH (deselected) or when CS2 is LOW(deselected) or when CS1 is LOW, CS2 is HIGH and bothLB and UB are HIGH, the device assumes a standby modeat which the power dissipation can be reduced down withCMOS input levels.

Easy memory expansion is provided by using Chip Enableand Output Enable inputs. The active LOW Write Enable(WE) controls both writing and reading of the memory. Adata byte allows Upper Byte (UB) and Lower Byte (LB)access.

The IS65WV12816ALL and IS65WV12816BLL are packgedin the JEDEC standard 48-pin mini BGA (6mm x 8mm) and44-Pin TSOP (TYPE II).

FUNCTIONAL BLOCK DIAGRAMA0-A16DECODER128K x 16MEMORY ARRAYVDDGNDI/O0-I/O7Lower ByteI/O8-I/O15Upper ByteI/ODATACIRCUITCOLUMN I/OCS2CS1OEWEUBLBCONTROLCIRCUITCopyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liabilityarising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on anypublished information and before placing orders for products.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

PIN CONFIGURATIONS48-Pin mini BGA (6mm x 8mm)(Package Code B)

1 2 3 4 5 8-Pin mini BGA (6mm x 8mm)2 CS Option (Package Code B2)

1 2 3 4 5 6ABCDEFGHLBI/O8I/O9GNDVDDI/O14I/O15NCOEUBI/O10I/O11I/O12I/O13NCA8A0A3A5NCNCA14A12A9A1A4A6A7A16A15A13A10A2CSII/O1I/O3I/O4I/O5WEA11N/CI/O0I/O2VDDGNDI/O6I/O7NCABCDEFGHLBI/O8I/O9GNDVDDI/O14I/O15NCOEUBI/O10I/O11I/O12I/O13NCA8A0A3A5NCNCA14A12A9A1A4A6A7A16A15A13A10A2CS1I/O1I/O3I/O4I/O5WEA11CS2I/O0I/O2VDDGNDI/O6I/O7NC44-Pin mini TSOP (Type II)(Package Code T)PIN DESCRIPTIONSA0-A16I/O0-I/O15Address InputsData Inputs/OutputsChip Enable InputOutput Enable InputWrite Enable InputLower-byte Control (I/O0-I/O7)Upper-byte Control (I/O8-I/O15)No ConnectionPowerGroundA4A3A2A1A0CS1I/O0I/O1I/O2I/O3VDDGNDI/O4I/O5I/O6I/O7WEA16A15A14A13A1212345671011121314151617181920212244434241403938373635343332313029282726252423A5A6A7OEUBLBI/O15I/O14I/O13I/O12GNDVDDI/O11I/O10I/O9I/O8NCA8A9A10A11NCCS1, CS2OEWELBUBNCVDDGND2Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

TRUTH TABLE

ModeNot Selected

WEXXXHHHHHLLL

CS1HXXLLLLLLLL

CS2XLXHHHHHHHH

OEXXXHHLLLXXX

LBXXHLXLHLLHL

UBXXHXLHLLHLL

I/O PIN

I/O0-I/O7I/O8-I/O15High-ZHigh-ZHigh-ZHigh-ZHigh-ZDOUTHigh-ZDOUTDINHigh-ZDIN

High-ZHigh-ZHigh-ZHigh-ZHigh-ZHigh-ZDOUTDOUTHigh-ZDINDIN

Vdd CurrentISB1, ISB2ISB1, ISB2ISB1, ISB2

ICCICCICC

Output DisabledRead

WriteICC

ABSOLUTE MAXIMUM RATINGS(1)

SymbolVTERMTSTGPT

Parameter

Terminal Voltage with Respect to GNDStorage TemperaturePower Dissipation

Value

–0.2 to VDD+0.3–65 to +150

1.0

UnitV°CW

Note:

1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is astress rating only and functional operation of the device at these or any other conditions above those indicated in the operationalsections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affectreliability.

OPERATING RANGE (VDD)

OptionAA1A2A3

Ambient Temperature

0°C to +70°C–40°C to +85°C–40°C to +105°C–40°C to +125°C

IS65WV12816ALL1.65V - 2.2V1.65V - 2.2V1.65V - 2.2V1.65V - 2.2V

IS65WV12816BLL 2.5V - 3.6V 2.5V - 3.6V 2.5V - 3.6V

2.5V - 3.6V

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

DC ELECTRICAL CHARACTERISTICS (Over Operating Range)

SymbolVOHVOLVIHVIL(1)ILIILO

Parameter

Output HIGH VoltageOutput LOW VoltageInput HIGH VoltageInput LOW VoltageInput LeakageOutput Leakage

GND ≤ VIN ≤ VDD

GND ≤ VOUT ≤ VDD, Outputs DisabledTest ConditionsIOH = -0.1 mAIOH = -1 mAIOL = 0.1 mAIOL = 2.1 mA

Vdd1.65-2.2V2.5-3.6V1.65-2.2V2.5-3.6V1.65-2.2V2.5-3.6V1.65-2.2V2.5-3.6V

Min.1.42.2——1.42.2–0.2–0.2–1–1

Max.——0.20.4VDD + 0.2VDD + 0.30.40.611

UnitVVVVVVVVµAµA

Notes:

1.VIL (min.) = –1.0V for pulse width less than 10 ns.

CAPACITANCE(1)

SymbolCINCOUT

ParameterInput CapacitanceInput/Output Capacitance

ConditionsVIN = 0VVOUT = 0V

Max.810

UnitpFpF

Note:

1.Tested initially and after any design or process changes that may affect these parameters.

4Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

IS65WV12816ALL, POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)

SymbolICCICC1ISB1ParameterVdd Dynamic OperatingSupply CurrentOperating SupplyCurrentTTL Standby Current(TTL Inputs)Test ConditionsVDD = Max.,IOUT = 0 mA, f = fMAXVDD = Max.,IOUT = 0 mA, f = 0VDD = Max.,VIN = VIH or VILCS1 = VIH , CS2 = VIL,f = 1 MHZ ORVDD = Max., VIN = VIH or VILCS1 = VIL, f = 0, UB = VIH, LB = VIHVDD = Max.,CS1 ≥ VDD – 0.2V,CS2 ≤ 0.2V,

VIN ≥ VDD – 0.2V, orVIN ≤ 0.2V, f = 0 OR

OptionsA, A1A2, A3A, A1A2, A3A, A1A2, A3Max.-70 ns1520770.60.6UnitmAmAmAULB Control

ISB2CMOS StandbyCurrent (CMOS Inputs)A, A1A2A3152050

µAULB Control

VDD = Max., CS1 = VIL, CS2=VIHVIN ≤ 0.2V, f = 0; UB / LB = VDD – 0.2VIS65WV12816BLL, POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)

SymbolICCICC1ISB1ParameterVdd Dynamic OperatingSupply CurrentOperating SupplyCurrentTTL Standby Current(TTL Inputs)Test ConditionsVDD = Max.,IOUT = 0 mA, f = fMAXVDD = Max.,IOUT = 0 mA, f = 0VDD = Max.,VIN = VIH or VILCS1 = VIH , CS2 = VIL,f = 1 MHZ ORVDD = Max., VIN = VIH or VILCS1 = VIL, f = 0, UB = VIH, LB = VIHVDD = Max.,CS1 ≥ VDD – 0.2V,CS2 ≤ 0.2V,

VIN ≥ VDD – 0.2V, orVIN ≤ 0.2V, f = 0 OR

OptionsA, A1A2, A3A, A1A2, A3A, A1A2, A3Max.-55 ns2530770.60.6Max.-70 ns2025770.60.6UnitmAmAmAULB Control

ISB2CMOS StandbyCurrent (CMOS Inputs)A, A1A2A3152565152565

µAULB Control

VDD = Max., CS1 = VIL, CS2=VIHVIN ≤ 0.2V, f = 0; UB / LB = VDD – 0.2VNote:

1.At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

AC TEST CONDITIONS

Parameter

Input Pulse Level

Input Rise and Fall TimesInput and Output Timingand Reference LevelOutput Load

65WV12816ALL

(Unit)

0.4V to VDD-0.2V

5 nsVREFSee Figures 1 and 2

65WV12816BLL

(Unit)

0.4V to VDD-0.3V

5nsVREFSee Figures 1 and 2

65WV12816ALL(1.65V-2.2V)

R1(Ω)R2(Ω)VREFVTM

307031500.9V1.8V

65WV12816BLL(2.5V - 3.6V)

307031501.5V2.8V

AC TEST LOADS

R1VTMOUTPUT30 pFIncludingjig andscopeR2VTMOUTPUT5 pFIncludingjig andscopeR2R1Figure 1Figure 2

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IS65WV12816ALL, IS65WV12816BLL

READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)

Symbol

ParameterRead Cycle TimeAddress Access TimeOutput Hold TimeCS1/CS2 Access TimeOE Access TimeOE to High-Z OutputOE to Low-Z Output

-55 nsMin.Max.55—10———5010—00

—55—552520—20—5520—

-70 nsMin.Max.70—10———5010—00

—70—703525—25—7025—

Unitnsnsnsnsnsnsnsnsnsnsnsns

tRCtAAtOHAtACS1/tACS2tDOEtHZOE(2)tLZOE(2)

tHZCS1/tHZCS2(2)CS1/CS2 to High-Z OutputtLZCS1/tLZCS2(2)CS1/CS2 to Low-Z OutputtBAtHZBtLZB

LB, UB Access TimeLB, UB to High-Z OutputLB, UB to Low-Z Output

Notes:

1.Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V, input pulse levels of 0.4 to 1.4V andoutput loading specified in Figure 1.

2.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

AC WAVEFORMS

READ CYCLE NO. 1(1,2) (Address Controlled) (CS1 = OE = VIL, CS2 = WE = VIH, UB or LB = VIL)

tRCADDRESStAAtOHAtOHADATA VALIDDOUTPREVIOUS DATA VALIDAC WAVEFORMS

READ CYCLE NO. 2(1,3)(CS1, CS2, OE, AND UB/LB Controlled)

tRCADDRESStAAtOHAOEtDOEtHZOECS1tACE1/tACE2tLZOECS2tLZCE1/tLZCE2tHZCS1/tHZCS2LB, UBtLZBtBAtHZBDOUTHIGH-ZDATA VALIDNotes:1.WE is HIGH for a Read Cycle.

2.The device is continuously selected. OE, CS1, UB, or LB = VIL. CS2=WE=VIH.3.Address is valid prior to or coincident with CS1 LOW transition.

8Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)

Symbol

ParameterWrite Cycle Time

-55 nsMin.Max. 55 45 45 0 0 45 40 250 — 5

—————————20—

-70 ns Min.Max. 70 60 60 0 0 60 50 30 0 — 5

—————————20—

Unitnsnsnsnsnsnsnsnsnsnsns

tWC

tSCS1/tSCS2CS1/CS2 to Write EndtAWAddress Setup Time to Write EndtHAtSAtPWBtPWEtSDtHDtHZWE(3)tLZWE(3)

Notes:

Address Hold from Write EndAddress Setup TimeLB, UB Valid to End of WriteWE Pulse WidthData Setup to Write EndData Hold from Write EndWE LOW to High-Z OutputWE HIGH to Low-Z Output

1.Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V, input pulse levels of 0.4V to 1.4Vand output loading specified in Figure 1.

2.The internal write time is defined by the overlap of CS1 LOW, CS2 HIGH and UB or LB, and WE LOW. All signals must be in valid states to initiate a Write, but any one can goinactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write.3.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

AC WAVEFORMS

WRITE CYCLE NO. 1(1,2) (CS1 Controlled, OE = HIGH or LOW)

tWCADDRESStSCS1tHACS1tSCS2CS2tAWtPWEWELB, UBtSAtHZWEtPWBtLZWEHIGH-ZDOUTDATA UNDEFINEDtSDtHDDINDATA-IN VALIDNotes:

1.WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS1 , CS2 and WE inputs and atleast one of the LB and UB inputs being in the LOW state.2.WRITE = (CS1) [ (LB) = (UB) ] (WE).

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IS65WV12816ALL, IS65WV12816BLL

AC WAVEFORMS

WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)

tWCADDRESSOEtSCS1tHACS1tSCS2CS2WELB, UBtSAtAWtPWEtHZWEHIGH-ZtLZWEDOUTDINDATA UNDEFINEDtSDtHDDATA-IN VALIDIntegrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

AC WAVEFORMS

WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)

tWCADDRESSOEtSCS1tHACS1tSCS2CS2WELB, UBtSAtAWtPWEtHZWEHIGH-ZtLZWEDOUTDINDATA UNDEFINEDtSDtHDDATA-IN VALID12Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

AC WAVEFORMS

WRITE CYCLE NO. 4 (UB/LB Controlled)

t WCADDRESSADDRESS 1t WCADDRESS 2OEt SACS1CS2WELB, UBDOUTDINLOWHIGHt HAt SAt PBWWORD 1t HAt PBWWORD 2t HZWEDATA UNDEFINEDHIGH-Zt LZWEt HDDATAINVALIDt SDt SDDATAINVALIDt HDUB_CSWR4.epsIntegrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

DATA RETENTION SWITCHING CHARACTERISTICS(LL)

SymbolParameterVDD for Data RetentionData Retention CurrentTest ConditionSee Data Retention WaveformVdd = 1.2V, CS1 ≥ VDD – 0.2VA, A1A2A3OptionsMin.1.2———0Typ.(1)—5————Max.3.6152565——UnitVµAVDRIDRtSDRtRDRData Retention Setup TimeRecovery TimeSee Data Retention WaveformSee Data Retention WaveformOnsnstRCNote 1: Typical values are measured at VDD = 3.0V, TA = 25C and not 100% tested.DATA RETENTION WAVEFORM (CS1 Controlled)

tSDRVDD1.65VData Retention ModetRDR1.4VVDRCS1 ≥ VDD - 0.2VCS1GNDDATA RETENTION WAVEFORM (CS2 Controlled)

Data Retention ModeVDD3.0CE22.2VVDR0.4VGNDCS2 ≤ 0.2VtSDRtRDR14Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

ORDERING INFORMATIONIS65WV12816ALL (1.65V - 2.2V)Temperature Range (A): 0°C to +70°C

Speed (ns)

70

Order Part No.IS65WV12816ALL-70TAIS65WV12816ALL-70BAIS65WV12816ALL-70B2A

Package

TSOP

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), 2 CS Option

Temperature Range (A1): –40°C to +85°C

Speed (ns)

70

Order Part No.

IS65WV12816ALL-70TA1IS65WV12816ALL-70BA1IS65WV12816ALL-70B2A1

Package

TSOP

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), 2 CS Option

Temperature Range (A2): –40°C to +105°C

Speed (ns)

70

Order Part No.

IS65WV12816ALL-70TA2IS65WV12816ALL-70BA2IS65WV12816ALL-70B2A2

Package

TSOP

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), 2 CS Option

Temperature Range (A3): –40°C to +125°C

Speed (ns)

70

Order Part No.

IS65WV12816ALL-70TA3IS65WV12816ALL-70BA3IS65WV12816ALL-70B2A3

Package

TSOP

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), 2 CS Option

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.B11/09/07

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IS65WV12816ALL, IS65WV12816BLL

ORDERING INFORMATIONIS65WV12816BLL (2.5V - 3.6V)Temperature Range (A): 0°C to +70°C

Speed (ns)

55

Order Part No.IS65WV12816BLL-55TAIS65WV12816BLL-55BAIS65WV12816BLL-55B2A

70

IS65WV12816BLL-70TAIS65WV12816BLL-70BAIS65WV12816BLL-70B2A

Package

TSOP

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), 2 CS OptionTSOP

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), 2 CS Option

Temperature Range (A1): –40°C to +85°C

Speed (ns)

55

Order Part No.

IS65WV12816BLL-55TA1IS65WV12816BLL-55BA1IS65WV12816BLL-55B2A1IS65WV12816BLL-70TA1IS65WV12816BLL-70BA1IS65WV12816BLL-70B2A1

Package

TSOP

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), 2 CS OptionTSOP

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), 2 CS Option

70

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IS65WV12816ALL, IS65WV12816BLL

ORDERING INFORMATION (continual)IS65WV12816BLL (2.5V - 3.6V)

TEMPERATURE RANGE (A2): –40°C TO +105°C

Speed (ns)

55

Order Part No.

IS65WV12816BLL-55TA2IS65WV12816BLL-55BA2IS65WV12816BLL-55B2A2

70

IS65WV12816BLL-70TA2IS65WV12816BLL-70BA2IS65WV12816BLL-70B2A2

Package

TSOP

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), 2 CS OptionTSOP

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), 2 CS Option

Temperature Range (A3): –40°C to +125°C

Speed (ns)

55

Order Part No.

IS65WV12816BLL-55TA3IS65WV12816BLL-55TLA3IS65WV12816BLL-55BA3IS65WV12816BLL-55BLA3IS65WV12816BLL-55B2A3IS65WV12816BLL-70TA3IS65WV12816BLL-70BA3IS65WV12816BLL-70B2A3

Package

TSOP

TSOP, Lead-free

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), Lead-freemini BGA (6mm x 8mm), 2 CS OptionTSOP

mini BGA (6mm x 8mm)

mini BGA (6mm x 8mm), 2 CS Option

70

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PACKAGING INFORMATION

Mini Ball Grid Array

Package Code: B (48-pin)

Top View1 2 3 4 5 6Bottom Viewφ b (48x)6 5 4 3 2 1ABCDDEFGHD1eABCDEFGHeEE1A2SEATING PLANEA1ANotes:1. Controlling dimensions are in millimeters.mBGA - 6mm x 8mmMILLIMETERSSym.N0.LeadsAA1A2DD1EE1eb— 0.240.607.905.90mBGA - 8mm x 10mmINCHESMin.Typ.Max.Sym.N0.LeadsMILLIMETERMin.Typ.Max. 48— 0.240.609.907.90—————1.200.30—10.108.10—INCHESMin.Typ.Max.Min.Typ.Max.48—————1.200.30—8.106.10—0.0090.0240.3110.232 — ————0.0470.012—0.3190.240AA1A2DD1EE1eb — ————0.0470.012—0.3980.3190.0090.0240.3900.3115.25 BSC3.75 BSC0.75 BSC0.300.350.400.207 BSC0.148 BSC0.030 BSC0.0120.0140.0165.25 BSC3.75 BSC0.75 BSC0.300.350.400.207 BSC0.148 BSC0.030 BSC0.0120.0140.016Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any timewithout notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised toobtain the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.D01/15/03

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PACKAGING INFORMATION

Plastic TSOPPackage Code: T (Type II)NN/2+1E1ENotes:1.Controlling dimension: millimieters,unless otherwise specified.2.BSC = Basic lead spacingbetween centers.3.Dimensions D and E1 do notinclude mold flash protrusions andshould be measured from thebottom of the package.4.Formed leads shall be planar withrespect to one another within0.004 inches at the seating plane.1DN/2ZDASEATING PLANE.ebA1LαCSymbolRef. Std.No. Leads (N)324450A—1.20—0.047—1.20—0.047—1.20—0.047A10.050.150.0020.0060.050.150.0020.0060.050.150.0020.006b0.300.520.0120.0200.300.450.0120.0180.300.450.0120.018C0.120.210.0050.0080.120.210.0050.0080.120.210.0050.008D20.8221.080.8200.83018.3118.520.7210.72920.8221.080.8200.830E110.0310.290.3910.40010.0310.290.3950.40510.0310.290.3950.405E11.5611.960.4510.46611.5611.960.4550.47111.5611.960.4550.471e1.27 BSC 0.050 BSC 0.80 BSC0.032 BSC0.80 BSC 0.031 BSCL0.400.600.0160.0240.410.600.0160.0240.400.600.0160.024ZD 0.95 REF 0.037 REF 0.81 REF 0.032 REF 0.88 REF 0.035 REFα0°5°0°5°0°5°0°5°0°5°0°5°MillimetersMinMaxInchesMinMaxPlastic TSOP (T - Type II)MillimetersInchesMinMaxMinMaxMillimetersMinMaxInchesMinMaxCopyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time

without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised toobtain the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.F06/18/03